发明名称 MEMORY DEVICE
摘要 PURPOSE:To improve reliability for an error check function, by generating intentionally an error on the data read out from a memory, and supplying it to an error detection circuit. CONSTITUTION:A parity error generating device 30 is provided between a parity bit memory 1, and a parity bit generation/parity error detection circuit 5. The error is generated intentionally on the data read out from the parity bit memory 1 by the parity error generating device 30. In this time, it is decided that the parity bit generation/parity error detection circuit 5 is out of order, if no error is detected by the parity bit generation/parity error detection circuit 5.
申请公布号 JPS6319053(A) 申请公布日期 1988.01.26
申请号 JP19860161887 申请日期 1986.07.11
申请人 HITACHI LTD;HITACHI VIDEO ENG CO LTD 发明人 KONDO NOBUKAZU;MASUKO ATSUSHI;SEKI YUKIHIRO;KITATSUME YOSHIAKI
分类号 G06F11/22;G06F12/16 主分类号 G06F11/22
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