摘要 |
PROBLEM TO BE SOLVED: To provide a clock producing circuit capable of continuously locking the wide frequency range. SOLUTION: This clock producing circuit 100 is constituted in such a manner that a phase error signal of a digital signal obtained from a recording medium 1 is extracted by a phase comparator 4, the phase error signal is filtered by a loop filter 5, the above-mentioned signal is converted to an analog signal by a digital/analog converter 6 for the fine control, the detection is made by a range detector 9 judging whether or not the above signal exists within the set range, a modulation reference signal is produced by a monotonous incresing/ decreasing device 10, the modulation reference signal is modulated by a pulse width modulator 11, a frequency set value and modulation reference signal are added by an adder 12, the added result is converted to the analog signal by a digital/analog converter 13 for the coarse control, the high range components of the analog signal are cut by a low-pass filter 14, the analog signals outputted from the digital/analog converter 6 for the fine control and the low-pass filter 14 are added by an analog adder 7, and the clock signal is outputted by a voltage controlled oscillator 8 based on an output signal of the analog adder 7. |