| 摘要 |
<p>A current mode logic and emitter coupled logic circit having a structure in that suitable for use to embody a current mode logic circuit or emitter coupled logic circuit comprises an upwardly operating transistor serving as a CML switching transistor on a P-type semiconductor wafer having an upper N-type region, an intermediate P-type region and lower N-type region, the upper N-type region functioning as a collector of the transistor, the P-type region functioning as a base thereof and the lower N-type region serving as an emitter thereof ; and, a downwardly operating transistor serving as a constant current transistor for a CML having a collector formed from the lower N-type region, a base formed from the P-type region and an emitter from the upper N-type region, the upper N-type area and the P-type region of the transistors being electrically isolated by trenches and etc and the N-type regions of the transistors of the CML circuit is the same region formed on the P-type wafer. According to the present invention since the emitter of the switching transistor and the collector of the constant current source transistor in the CML circuit are naturally connected to each other by way of the N-type silicon region formed on the P-type wafer substrate without using separative contacts, a degree of integration can be greatly improved as compared with the conventional structure. In addition, since the capacitor is minimized between the silicon substrate and the collectors of the switching transistors, an operation speed of the circuit can be increased considerably. <IMAGE></p> |
