发明名称 TIMING PICKUP CIRCUIT
摘要 PURPOSE:To pick up a timing signal from binary or ternary code, by obtaining an output signal of the 1st and 2nd level shift circuits which can change level shift amount and providing the 1st and 2nd differential amplifiers making slice of input waveform through the output signal of the level shift circuits. CONSTITUTION:Differential output signals (a), (b) of an equalizing amplifier circuit are as shown (A) for binary code and as shown (B) for ternary code. A binary/ternary control terminal 18 is grounded for binary code and opened for ternary code. Then, the level shift amount at level shift circuits 11, 12 can be changed. At a binary code, only a differential amplifier 13 is operated and no differential amplifier 14 is operative. Signals c-f respectively level-shfted at the circuits 11, 12 are given to the differential amplifiers 13, 14 and at binary code a signal (g) shown in (C) is outputted from an output terminal 19 and at ternary code, the signal (g) shown in (D) is outputted.
申请公布号 JPS57125546(A) 申请公布日期 1982.08.04
申请号 JP19810011814 申请日期 1981.01.29
申请人 FUJITSU KK;NIPPON DENSHIN DENWA KOSHA 发明人 YAMAGUCHI KAZUO;TAKAHASHI MOTOHIDE;TSUDA TOSHITAKA;NAKAJIYOU TAKAFUMI;NAGATA YOUICHI;KAMOTO TSUTOMU
分类号 H04L7/02 主分类号 H04L7/02
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