发明名称 |
Semiconductor integrated circuit device with test mode for testing CPU using external Signal |
摘要 |
An output gate means is provided which is capable of outputting individual signals selectively to an internal bus; the individual signals are interchanged among a plurality of functional modules connected to the internal bus which is interfaced with an external circuit. An input gate means is provided which is capable of supplying selectively a signal, input to the internal bus, to a specified functional module in place of an individual signal. |
申请公布号 |
US5581698(A) |
申请公布日期 |
1996.12.03 |
申请号 |
US19930048394 |
申请日期 |
1993.04.15 |
申请人 |
HITACHI, LTD.;HITACHI MICROCOMPUTER ENGINEERING LTD. |
发明人 |
MIWA, YOSHIYUKI;JOUNO, TSUYOSHI;KEIDA, HARUO;NAKADA, KUNIHIKO;YASUDA, HAJIME |
分类号 |
G01R31/3185;G06F11/267;(IPC1-7):G06F11/22;G06F11/28 |
主分类号 |
G01R31/3185 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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