发明名称 |
Non-volatile semiconductor memory |
摘要 |
Each memory cell of a non-volatile semiconductor memory essentially consisting of a one-transistor type memory cell comprising only of an MOSFET having a floating gate electrode. When an electric programming operation is carried out, a positive voltage is applied to an n type drain region, a negative voltage is applied to a control gate and a source region is grounded. When an erasing operation is carried out, the positive voltage is applied to the control gate while all the other electrodes and a semiconductor substrate are grounded. Low power consumption can be accomplished because both of the programming operation and erasing operations are carried out by utilizing a tunneling mechanism. Particularly because the negative voltage is used for the word line, a drain voltage at the time of programming of data can be lowered, so that degradation of a gate oxide film at a channel portion can be mitigated.
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申请公布号 |
US5910913(A) |
申请公布日期 |
1999.06.08 |
申请号 |
US19980124794 |
申请日期 |
1998.07.30 |
申请人 |
HITACHI, LTD. |
发明人 |
KATO, MASATAKA;ADACHI, TETSUO;TANAKA, TOSHIHIRO;SASAKI, TOSHIO;KUME, HITOSHI;KIMURA, KATSUTAKA |
分类号 |
G11C8/08;G11C16/04;G11C16/10;G11C16/12;G11C16/16;G11C16/34;H01L21/8247;H01L27/115;H01L29/788;(IPC1-7):G11C7/00 |
主分类号 |
G11C8/08 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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