发明名称 |
PHASE LOCKED TIME INTERVAL ANALYZER |
摘要 |
A method (Figure 2) of analysis of a time interval between two selected measurement edges of interest (302, 303) includes locking a plurality of at least three substantially interchangeable oscillators (100-1-100-k) to a common reference frequency, the oscillators containing a digital locked-loop (DLL) circuit . The method includes operating one oscillator (100-1) as a timebase oscillator, and operating the other oscillators (100-2-100-k) as edge-resettable measurement oscillators. The method includes coupling (202) one oscillator with a switched and physically-immutable parametric variation, producing an offset in the frequency of the coupled oscillator relative to the frequency of the other oscillators. The method includes phase-aligning (203) each of the measurement oscillators to a triggering pulse created by one of selected measurement edges of interest, oscillating (204) each phase-aligned measurement oscillator, and counting (205) the number of oscillation cycles of the phase-aligned measurement oscillator from the time of phase-alignment until the time of phase matching.
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申请公布号 |
WO2006044148(A3) |
申请公布日期 |
2006.10.05 |
申请号 |
WO2005US34940 |
申请日期 |
2005.09.28 |
申请人 |
AGILENT TECHNOLOGIES, INC. |
发明人 |
WALLACE, HUGH, S.;EISHEIMER, G., ROBERT;WILHELMI, CECELI, ANN |
分类号 |
H03B1/04;G04F10/06;H03L7/081;H03L7/099 |
主分类号 |
H03B1/04 |
代理机构 |
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主权项 |
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地址 |
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