发明名称 STATES ENCLODING IN MULTI-BIT FLASH CELLS FOR OPTIMIZING ERROR RATE
摘要 To store N bits of M>=2 logical pages, the bits are interleaved and the interleaved bits are programmed to [N/M] memory cells, M bits per cell. Preferably, the interleaving puts the same number of bits from each logical page into each bit-page of the [N/M] cells. When the bits are read from the cells, the bits are de-interleaved. The interleaving may be deterministic or random, and may be effected by software or by dedicated hardware.
申请公布号 KR20070087557(A) 申请公布日期 2007.08.28
申请号 KR20077010412 申请日期 2005.10.26
申请人 MSYSTEMS LTD. 发明人 MURIN MARK
分类号 G11C16/10 主分类号 G11C16/10
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