Composite wafer semiconductor

摘要

A composite wafer semiconductor device includes a first wafer and a second wafer. The first wafer has a first side and a second side, and the second side is substantially opposite the first side. The composite wafer semiconductor device also includes an isolation set is formed on the first side of the first wafer and a free space is etched in the isolation set. The second wafer is bonded to the isolation set. A floating structure, such as an inertia sensing device, is formed in the second wafer over the free space. In an embodiment, a surface mount pad is formed on the second side of the first wafer. Then, the floating structure is electrically coupled to the surface mount pad using a through silicon via (TSV) conductor.

主权项

1. A device comprising:
a first substrate; a patterned first conductor layer and a first isolation set formed on a first side of the first substrate; a patterned second conductor layer and a second isolation set formed on the first isolation set; a free space etched in the second isolation set over a portion of the first isolation set; a second substrate bonded to the second isolation set; a microelectromechanical system (MEMS) device formed in the second substrate over the free space; a first via conductor formed through the second substrate and through a portion of the second isolation set to the second conductor layer, wherein the first via conductor electrically couples the MEMS device to the second conductor layer; a backside via formed from a second side of the first substrate to the first conductor layer; a backside isolation layer formed on the second side of the first substrate; a backside via conductor formed in the backside via; and a third substrate disposed over the second substrate, wherein the third substrate is bonded to the second substrate by a first eutectic bonding material and a second eutectic bonding material.