发明名称 Enhanced physical downlink control channel scrambling and demodulation reference signal sequence generation
摘要 Methods, apparatuses, and systems are described to provide enhanced physical downlink control channel scrambling and demodulation reference signal sequence generation.
申请公布号 US9402251(B2) 申请公布日期 2016.07.26
申请号 US201314127118 申请日期 2013.08.05
申请人 INTEL CORPORATION 发明人 Han Seunghee;Zhu Yuan;Chen Xiaogang;Qin Yi;Fwu Jong-Kae
分类号 H04W72/04;H04L27/26;H04J11/00;H04L5/00;H04L27/20;H04L1/00 主分类号 H04W72/04
代理机构 Schwabe, Williamson & Wyatt, P.C. 代理人 Schwabe, Williamson & Wyatt, P.C.
主权项 1. An apparatus to be employed in an enhance node B (eNB), the apparatus comprising: scrambling circuitry to receive a bit sequence that includes downlink control information (DCI) to be transmitted on an enhanced physical downlink control channel (EPDCCH) and to scramble the bit sequence based on a cell identifier to provide a scrambled bit sequence; and modulating circuitry coupled with the scrambling circuitry to receive the scrambled bits and to modulate the scrambled bits, with a quadrature phase shift keying modulation scheme, to provide a block of complex-valued modulation symbols, wherein the cell identifier is a virtual cell identifier; the DCI is to be transmitted in a first EPDCCH set; the virtual cell identifier corresponds to the first EPDDCH set; and the scrambling circuitry is to scramble the DCI bits based on a scrambling initialization seed cint given by cint=└ns/2┘*29+NIDePDCCH where ns is a slot number within a radio frame and NIDePDCCH is the virtual cell identifier.
地址 Santa Clara CA US