Additional etching to increase via contact area

摘要

An integrated circuit structure includes a dielectric layer, and a conductive line in the dielectric layer. The conductive line has a first top surface and a second top surface lower than the first top surface, and a sidewall connecting the first top surface to the second top surface. A via includes a portion overlying the second top surface of the conductive line. The via is electrically coupled to the conductive line through the second top surface and the sidewall of the conductive line.

主权项

1. A method comprising:
forming a conductive line in a first dielectric layer; forming a second dielectric layer over the conductive line and the first dielectric layer; performing a first etching step to etch the second dielectric layer to form an opening extending into the second dielectric layer and further into the first dielectric layer, with at least a portion of the opening substantially aligned to the conductive line, wherein the opening generated by the first etching step has a bottom lower than a top surface of the conductive line; performing a second etching step to remove a corner portion of the conductive line; and filling the opening with a conductive material to form a via electrically coupled to the conductive line.