| 摘要 |
PROBLEM TO BE SOLVED: To provide a register circuit reduced in power consumption. SOLUTION: A D-flip flop(DFF) for storing a count value consisting of fourteen bits is grouped into a register bank 19 consisting of upper four bits and a register band 20 consisting of lower ten bits. Only at the time of inputting the lower ten bits of input voice data, a clock is inputted to the bank 20. A comparator 25 compares the data stored in the bank 19 at present with the upper four bits of newly inputted input voice data, and when both the data do not coincide with each other, an 'H' level is sent to a latch element 24. The element 24 latches a signal outputted from the comparator 25 by the inverted signal of a system clock CLK. Namely, only when the data stored in the bank 19 do not coincide with the upper four bits of the input voice data, a clock is inputted to the bank 19. |
