Capacity dividable memory IC

摘要

Two memory areas on a wafer are coupled through pass transistors to double the memory capacity of each area and can be sawed to yield two memory chips each with single memory area. A pair of pass transistors are used to couple each dedicated functional pad in both memory areas, when the pass transistors are turned on. The connection between the pass transistor pair can be sawed through to yield single capacity memory dice. The memory capacity can be further increased by coupling more memory areas together with pass transistors.