| 摘要 |
PROBLEM TO BE SOLVED: To reduce input voltage distortion at the input terminal of a comparator which is caused by a parasitic capacity and a parasitic resistance of an interpolation circuit when interpolating an output voltage by using the interpolation circuit at the output terminal of an amplifier and then inputting it to the comparator in a flash A/D converter. SOLUTION: The flash A/D converter includes a series of amplifiers 11, a series of interpolation circuits 12, and a series of comparators 13. In a predetermined lower voltage level and a higher voltage level of a reference voltage, the series of amplifiers 11 includes a dummy amplifier TD3 having a dummy output terminal disposed between adjacent amplifiers A4 and A5, and the series of interpolation circuits 12 includes a dummy interpolation circuit 21 having dummy interpolation nodes DH1 and DH2 connected to the dummy output terminals of adjacent dummy amplifiers TD3 and TD2, respectively, via dummy resistors DR1-DR4. Meanwhile, the series of comparators 13 includes a dummy comparator DC7. The amplifiers A1 and A7 at the lowest and highest levels are connected to the dummy amplifiers BD1 and TD1 at the lowest and highest levels, respectively, via resistors. COPYRIGHT: (C)2009,JPO&INPIT
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