WEAR LEVELING IN SOLID STATE DEVICES

摘要

Embodiments of the present disclosure provides a memory-efficient mechanism for identifying memory blocks with a low wear count. More particularly, embodiments of the present disclosure provides a mechanism for identifying a memory block whose wear count is within the bottom p % of all wear counts associated with memory blocks in a storage system. If a memory controller always performs the garbage collection operation on a memory block whose wear count is within the bottom p % of all wear counts, then the memory controller is expected to utilize the remaining memory blocks (e.g., memory blocks whose wear count is within the upper (100-p) % of all wear counts) efficiently and level the wear count of at least the remaining memory blocks.

主权项

1. A method comprising:
maintaining, at a memory controller in a storage system comprising a plurality of memory blocks, a wear count table having a plurality of wear count elements, wherein each of the wear count elements is assigned to at least one wear count; detecting, at the memory controller, a data removal operation performed on one of the plurality of memory blocks; increasing, by the memory controller, a wear count associated with the one of the plurality of memory from a first wear count to a second wear count; identifying a first wear count element of the wear count table assigned to the first wear count; identifying a second wear count element of the wear count table assigned to the second wear count; and when the first wear count element and the second wear count element are different, decreasing a value of the first wear count element by one and increasing a value of the second wear count element by one.