发明名称 Semiconductor RAM device with a single write signal line for one column in memory cell array and for one port
摘要 In a semiconductor random access memory device having a memory cell array, each of the memory cells includes a flipflop circuit having two opposite terminals as a data holding element. The flipflop circuit is applied with "1" and "0" signals to the two opposite terminals, those applied signals are held at the opposite terminals, respectively. In order to small size the memory device by avoiding use of a pair of write signal lines for writing data signal to the memory cell, the memory cell is provided with an inverter circuit connecting between the two terminals of the flipflop circuit. A data signal is applied to one of two terminals through a single write signal line, while is applied to the other terminal as an inverted signal through the inverter circuit.
申请公布号 US5477502(A) 申请公布日期 1995.12.19
申请号 US19940272033 申请日期 1994.07.08
申请人 NEC CORPORATION 发明人 HAYASHI, KATSUYOSHI
分类号 G11C8/16;G11C11/401;G11C11/405;G11C11/41;(IPC1-7):G11C7/00 主分类号 G11C8/16
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