发明名称 |
SINGLE-INSTRUCTION PLURAL-DATA PROCESSING FOR WHICH SCALAR/VECTOR OPERATION IS COMBINED |
摘要 |
PROBLEM TO BE SOLVED: To improve the efficiency and speed of a program at the time of applying multi-media by providing a vector register or a scalar register as an operand and parallelly operating the multiple data elements of the vector register so as to improve calculation ability. SOLUTION: A multi-media processor 100 is provided with a processing core 105 provided with a general purpose processor 110 and a vector processor 120. The processing core 105 is connected to the remaining of the multi-media processor 100 through a cache sub system 130 provided with SRAMs 160 and 190, a ROM 170 and a cache control 180. The processor 100 is realized by using a general purpose processor architecture. In response to a signal instruction, the processing core 105 parallelly performs arithmetic operations for connecting one element among the data elements from the vector register and a scalar value from the scalar register for the respective arithmetic operations. |
申请公布号 |
JPH10143494(A) |
申请公布日期 |
1998.05.29 |
申请号 |
JP19970222417 |
申请日期 |
1997.08.19 |
申请人 |
SAMSUNG ELECTRON CO LTD |
发明人 |
MOHAMED MOATAZ A;PARK HEON CHUL;NGUYEN LE TRONG;WONG RONEY SAU DON |
分类号 |
G06F17/16;G06F9/06;G06F9/38;G06F13/00;G06F15/16;G06F15/80;G06T1/20;H04N7/24 |
主分类号 |
G06F17/16 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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