| 摘要 |
<p>A repeating binary word detecting circuit (14-44) produces a plurality of phase shifted samples of the logic of each binary bit forming the word. The plurality of samples are respectively compared (17) with a stored sequence of bits (18) forming the binary word to be detected. These comparisons are made for every possible beginning sequence of samples or stored bits between the time of two samples. An indication is given if a selected number of comparisons agree. A threshold circuit (41) produces a decode output in response to a selected number of indications based on at least two phase shifted samples. </p> |
