| 摘要 |
PURPOSE:To attain the high speed of the switching speed by controlling of on and off P channel FET and N channel FET which drives the main switching element alternately. CONSTITUTION:When the driving circuit is in a high level, a first switching circuit 8 becomes on. While, because bias voltage 10 corresponding to the driving signal is applied in a second switching circuit 9, the circuit 9 maintains the off state as far as the voltage for the driving signal does not become higher than the voltage 10. And as the circuit 8 is on state, P channel FET 3 becomes on and a main switching element 7 becomes on. When the driving signal becomes low, the circuit 8 becomes off, the circuit 9 becomes on and FET 3 becomes off. N channel FET 5 works for discharging the electric charge stored in an element 7 and the element 7 rapidly becomes off. Thus, the driving circuit for switching element operates so that FET 3, 5 can not be on simultaneously. |
