| 摘要 |
PROBLEM TO BE SOLVED: To shorten a screening time, and to sufficiently operate memory cell screening, inter-adjacent word line screening and bit line screening, and peripheral circuit screening. SOLUTION: A row decoder 18 for receiving a row address pre-decode signal, and for generating a row address decode signal is connected with a word line driver 15 for driving plural word lines WL. A control circuit 19 for raising plural word lines to which the row address pre-decode signal and plural word line rise test mode switching signal AWL are inputted is connected with the row decoder 18. A word line driving signal generating circuit 22 to which a word line driving timing control signal WD and the row address pre-decode signal are inputted is connected between a row pre-decoder 20 and the word line driver 15.
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