发明名称 INTERMEDIATE PROCESSING CIRCUIT FOR WIDE DYNAMIC SIGNAL
摘要 PROBLEM TO BE SOLVED: To carry out the compression/extension of signal, the compensation of the deterioration of a photodetecting pattern and the various corrections of a resolution ratio, disturbance light ratio, optical signal lightness/darkness ratio or optical signal contrast ratio by a single circuit. SOLUTION: In this intermediate processing circuit for wide dynamic signal, asymmetric CRD type two-terminal circuits (C1, R1, R2 and D1) are connected to the inverted terminal of an operational amplifier IC, bidirectional RD type two-terminal circuits (D2 and R3) are connected to a feedback circuit, and an offset control circuit is connected to the non-inverted terminal. Each of bidirectional RD type two-terminal circuits (D2 and R3) is constituted by parallel connecting a third resistor R3 for changing the operating point of a bidirectional two-terminal diode circuit D2 to this circuit and each of asymmetric CRD type two-terminal circuits (C1, R1, R2 and D1) is constituted by serial/parallel or parallel/serial connecting a first capacitor C1, a first resistor R1 and each of asymmetric RD type two-terminal circuits (R2 and D1).
申请公布号 JP2002330259(A) 申请公布日期 2002.11.15
申请号 JP20010174841 申请日期 2001.05.06
申请人 OPTOELECTRONICS CO LTD 发明人 TAZAKI SHINICHI
分类号 G06K7/00;H03G11/08;H04N1/028;H04N1/409;H04N5/335;H04N5/355;H04N5/357;H04N5/369;H04N5/372 主分类号 G06K7/00
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