发明名称 SIGNAL PROCESSING CIRCUIT FOR FM RADIO RECEIVER
摘要 PROBLEM TO BE SOLVED: To provide a signal processing circuit for an FM radio receiver that reduces the sampling frequency in its analog/digital conversion. SOLUTION: An integrator 16 detects the level of the output of an amplifier 14. The output of the integrator 16 controls the gain of the amplifier 14 so tat the output of the amplifier 14 is a sine wave output. Thus, a DSP 20 can accurately conduct demodulation by decreasing the sampling gain of an analog/ digital converter 18.
申请公布号 JP2001156666(A) 申请公布日期 2001.06.08
申请号 JP19990334879 申请日期 1999.11.25
申请人 SANYO ELECTRIC CO LTD 发明人 SUZUKI HIROHISA;TAIRA MASAAKI
分类号 H04S5/00;G10K15/12;H04B1/16;H04B1/26 主分类号 H04S5/00
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