| 摘要 |
<p>Three state high speed amplifiers having a high output impedance when disabled and a minimum glitch when enabled and disabled. The amplifiers utilize complementary emitter followers (Q1, Q2) for the output stage. When the amplifiers are disabled, circuitry (VOUT+V1, VOUT-V1) provides for the purpose is responsive to the voltage on the output of the amplifier to maintain the base-emitter voltages of the output emitter followers (Q1, Q2) at a substantially constant level below the turn-on voltages of the transistors, such as substantially zero volts. When the amplifier is enabled, the circuitry (VOUT+V1, VOUT-V1) is also responsive to the voltage on the output of the amplifier, but this time to allow the base-emitter voltages of the output emitter followers (Q1, Q2) to at least rise to the turn-on voltages of the transistors. Thus the reverse base emitter voltage of the output transistors (Q1, Q2) when the circuit is disabled is limited, and the output glitch on enable and disable is minimal because of the limited base-emitter voltage swing of the output transistors (Q1, Q2) between disable and enable.</p> |
