THE STRUCTURE OF NMI CONTROLLER AND ITS CONTROL METHOD

摘要

PURPOSE: An apparatus and a method for controlling a non-maskable interrupt signal are provided to transfer an urgent external event to a processor quickly and effectively, by including a processor interface unit, a control circuit and an interrupt control register, a to enable the interrupt signal to be driven and withdrawn, by using the data stored in the register. CONSTITUTION: An NMIC(Non-Maskable Interrupt Controller)(102) is connected to a processor(101) via a processor bus(106) and an NMI signal(107). Three external signals of an urgent interrupt signal(103), a reset signal(104) and a clock signal(105) are inputted into the NMIC(102). The NMIC(102) transfers the urgent event applied from outside, to the processor(101) via the NMI signal(107). The NMIC(102) includes a processor interface circuit(108), a control circuit(109), an interrupt control register(110) and an internal bus(111). The processor interface circuit(108) provides a register read path between the processor(101) and the NMIC(102) via the processor bus(106). The interface circuit(108) and the register(110) are connected to each other via the internal bus(111). The circuit(109) controls all internal resources and connection signals of the NMIC(102).