发明名称 |
FABRICATION METHOD AND STRUCTURE OF A FLASH MEMORY |
摘要 |
A fabrication method and a structure of a flash memory. Several first shallow trench isolations and second shallow trench isolations are formed in a memory circuit region and a peripheral circuit region of a substrate, respectively. The first shallow trench isolations are shallower than the second shallow trench isolations. Several gates are formed along a direction perpendicular to the substrate in the memory circuit region. A self-aligned source region process is performed to remove the isolation layer within every other first shallow trench isolations between the gates. A common source region and a column of separate drain regions are thus alternatively formed between the gates. The drain regions in the same column are isolated by the first shallow trench isolations.
|
申请公布号 |
US2002110973(A1) |
申请公布日期 |
2002.08.15 |
申请号 |
US20010784229 |
申请日期 |
2001.02.13 |
申请人 |
UNITED MICROELECTRONICS CORP. |
发明人 |
LIOU JIH-WEI;CHEN HWI-HUANG;CHEN YEN-CHANG;LIN PAO-CHUAN |
分类号 |
H01L21/762;H01L21/8247;H01L27/105;(IPC1-7):H01L21/823 |
主分类号 |
H01L21/762 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|