| 发明名称 |
AVERAGING DEVICE WITH LOCKING FOR DIGITAL INFORMATION PHASING |
| 摘要 |
This device is used in systems for transmitting discrete information. It has enhanced resistance to noise at the appearance of end distortions of the received binary signals of the "dominance" type. The device consists of four "AND" logical schemes (3, 5, 6 and 7), triggers (2 and 4) and a reverse counter (1).
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| 申请公布号 |
BG50819(A1) |
申请公布日期 |
1992.11.16 |
| 申请号 |
BG19900092875 |
申请日期 |
1990.09.20 |
| 申请人 |
STEFANOV, VALENTIN M.;ALTANOV, VALENTIN D.;IVANOV, VALENTIN A. |
发明人 |
STEFANOV, VALENTIN M.;ALTANOV, VALENTIN D.;IVANOV, VALENTIN A. |
| 分类号 |
H04L17/00;(IPC1-7):H04L17/00 |
主分类号 |
H04L17/00 |
| 代理机构 |
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