发明名称 NUMERICAL ADDER CIRCUIT BY DESTINATIONS
摘要 PURPOSE:To calculate counter values by destinations by turning the destination and counter value to the format of a packet and successively inputting them to a hardware. CONSTITUTION:Packets DIa and DIb provided with destination information and natural numerical values to be successively inputted are received, when the destination information is same, the numerical values are added each other, and one packet is erased. When those packets are provided with the different destinations, addition processing is autonomously performed by destinations by constituting a Batcher-banyan Network while using addition/exchange elements FA1 and SW2 to perform switching corresponding to the levels of the destinations. Outputs DOa and DOb of this network are suitably delayed by DL 13, 16 and 17, afterwards, the output of the network is inputted through a delay circuit to the network again so that the head of the newly inputted packet and the head of the re-inputted packet can be arranged, and the output of the network is written in a FIFO memory corresponding to an instruction from a host.
申请公布号 JPH0662054(A) 申请公布日期 1994.03.04
申请号 JP19920100088 申请日期 1992.04.21
申请人 NEC CORP 发明人 ITO ATSUO
分类号 H04L12/56;(IPC1-7):H04L12/56 主分类号 H04L12/56
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