| 摘要 |
<p>A method and apparatus is disclosed for use in an implantable device that includes an analog-to-digital converter (ADC) for converting electrograms (such as EKG signals) into digital codes that can be stored in memory. The ADC constructed according to the present invention is capable of achieving considerable power savings by minimizing the number of clock cycles required to determine the correct digital code for a particular sample point on the electrogram signal, thus making it possible to turn off some or all of the ADC logic during idle periods. The ADC includes prediction logic that provides a starting point for subsequent searching for the correct digital code value. The prediction logic receives recent code conversions values which it uses to predict the current digital code value. This predicted digital code is converted to an analog value and compared with the actual electrogram voltage to determine if the prediction is above or below the correct code representation. Next, the ADC adds (or subtracts) a constant value (C) to (or from) the predicted code and compares the result to the actual electrogram voltage. If the ADC determines that the predicted value is within the constant value (C) of the correct digital code, then the ADC counts in the proper direction (determined by the first comparison) until the comparator changes output state, indicating that the correct code is found. If the ADC determines that the predicted value is not within the constant value (C) of the correct digital code, then the successive approximation logic is enabled and used to find the correct code. By selecting the constant value (C) to be approximately equal to the number of clock cycles required for the successive approximation circuitry to determine the correct code, the present invention, on average, can determine the correct code significantly faster than can be obtained using only successive approximation logic.</p> |
