| 发明名称 |
INFORMATION PROCESSOR AND INFORMATION PROCESSING METHOD |
| 摘要 |
<p>PROBLEM TO BE SOLVED: To effectively utilize a memory. SOLUTION: An inter-segment de-shuffle circuit 352 processes received packet data and error flag in time division to allow an external memory 305 to store the data if necessary.</p> |
| 申请公布号 |
JP2001224020(A) |
申请公布日期 |
2001.08.17 |
| 申请号 |
JP20000035381 |
申请日期 |
2000.02.14 |
| 申请人 |
SONY CORP |
发明人 |
KONDO TETSUJIRO;NAKAYA HIDEO;WATANABE TSUTOMU;WADA SEIJI;OTSUKA HIDEKI;TAKAHASHI YASUAKI;NAGANO TAKAHIRO;OTA KOJI |
| 分类号 |
H04N19/11;H04N7/24;H04N19/00;H04N19/423;H04N19/426;H04N19/587;H04N19/59;H04N19/65;H04N19/85;H04N19/88;H04N19/89;H04N19/98 |
主分类号 |
H04N19/11 |
| 代理机构 |
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代理人 |
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