| 摘要 |
A flash memory device with an improved erase algorithm for erasing a plurality of memory cells that are arranged in intersections of wordlines and bitlines, respectively, includes an array of the memory cells. In the erase algorithm, all memory cells of the sector are erased at the same time. A pass/fail check & control logic then checks whether the memory cells are overerased. When one of a group of the erased memory cells is overerased, soft-program voltages are applied to the overerased memory cells such that the overerased memory cells become soft-programmed. After boosting one of the soft-program voltages, the operations of checking, soft-programming, and boosting are carried out repeatedly until a threshold voltage of the overerased memory cell moves within a target threshold voltage range of the erased memory cell. Therefore, overerasing is cured based upon program characteristics, without overcuring.
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