发明名称 LSI TESTING CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide an LSI testing circuit individually testing a test object terminal and easily specifying a soldering defective place without being affected by the logics of the terminals other than the test object terminal. SOLUTION: This LSI testing circuit is provided with a timing signal generation section 102 generating a frame signal indicating the top bit of an inputted/ outputted serial signal and an address signal indicating the n-th bit of the serial signal, a test signal generation section 103 extracting the n-th bit indicated by the address signal from the serial signal and generating an output test signal testing the output terminal of an LSI corresponding to the address signal, a selector 125 selectively outputting the output test signal from the test signal generation section or an LSI normal output signal according to a test mode signal, and a data conversion section 104 outputting the signal inputted from the input terminal corresponding to the address signal at the n-th bit of the serial signal. The input terminal specified by the address signal is individually tested.
申请公布号 JP2001324542(A) 申请公布日期 2001.11.22
申请号 JP20000139297 申请日期 2000.05.12
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 NAGAOKA KIMIHIKO
分类号 G01R31/28;G06F11/22 主分类号 G01R31/28
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