| 摘要 |
PROBLEM TO BE SOLVED: To provide a data error detecting circuit for a memory and a switch circuit for facilitating a countermeasure to any bit width without adding any error check bit. SOLUTION: When data are written in a memory 1, a writing data adding circuit 2 starts the addition of writing data upon detecting an FP101 being a pulse indicating the leading of data, and outputs the added result to a data error detecting circuit 4 when the next FP101 is detected. A reading data adding circuit 3 starts the addition of reading data at the time of receiving the FP101, and outputs the added result to the data error detecting circuit 4 when the next FP101 is detected. The data error detecting circuit 4 compares the added result from the writing data adding circuit 2 with the added result from the reading data adding circuit 3, and generates an alarm signal 107 when any difference is detected.
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