发明名称 Semiconductor memory device having self-aligned charge trapping layer
摘要 A semiconductor memory device having a self-aligned charge trapping layer and a method of manufacturing the same in which a consistent length of an ONO layer is ensured. Here, an insulating stacked structure is self-aligned to a bottom surface of conductive spacers.
申请公布号 US7345336(B2) 申请公布日期 2008.03.18
申请号 US20040000011 申请日期 2004.12.01
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 JEON HEE-SEOG;YOON SEUNG-BEOM;KIM YONG-TAE
分类号 H01L21/8247;H01L29/792;H01L21/28;H01L21/336;H01L21/8246;H01L27/115;H01L29/788 主分类号 H01L21/8247
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