| 摘要 |
A method and apparatus are provided for high performance, high voltage memory operations on selected memory cells ( 200 ) of a semiconductor memory device ( 100 ). A high voltage generator ( 106 ) during program or erase operations provides a continuous high voltage level ( 702 ) on selected word lines ( 502 ) and maintains a continuous high voltage level supply to a bit line decoder ( 120 ) which sequentially provides the high voltage level ( 706 ) to a first portion of bit lines ( 504 ) and discharges ( 708 ) those bit lines ( 504 ) before providing the high voltage level to a second portion ( 710 ). For additional improvements to program operations, the high voltage generator ( 106 ) decouples high voltages provided to the word lines ( 502 ) and the bit lines ( 504 ) by providing a current flow control device ( 1208 ) therebetween and provides a boosting voltage at a time ( 1104 ) to overcome a voltage level drop ( 1102 ) resulting from a capacitor load associated with selected bit lines ( 504 ) and/or the bit line decoder ( 120 ) precharges ( 1716 ) a second portion of the bit lines ( 504 ) while providing a high voltage level to a first portion to program ( 1706 ) a first portion of memory cells ( 200 ). For improvements to read operations, whether dynamic reference cells ( 2002 ) are blank is determined by providing non-identically regulated high voltage levels from a first voltage source ( 2112 ) to the dynamic reference cells ( 2002 ) and from a second voltage source ( 2104 ) to static reference cells ( 2004 ) and, if the dynamic reference cells ( 2002 ) are not blank, reads selected memory cells ( 200 ) by providing identically regulated high voltage levels to the selected memory cells ( 200 ), the dynamic reference cells ( 2002 ) and the static reference cells ( 2004 ).
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