发明名称 INTEGRATED CIRCUIT DESIGN METHOD
摘要 A method for designing an integrated circuit (IC) comprises the steps of: receiving a first layout including a first pattern; receiving a second layout including a second pattern, wherein the second layout is that the first pattern is separated from the second pattern when the first layout and the second layout overlap; providing a cut pattern between the first pattern and the second pattern, and overlapping the first pattern when the first layout, the second layout and the cut pattern overlap; and providing a jog extending from the cut pattern to further overlap the first pattern with a length when a spacing between the second pattern and an edge of the cut pattern overlapping the first pattern is lower than a predetermined value. A ratio of the length of the jog to the spacing between the second pattern and the edge of the cut pattern overlapping the first pattern is in a range of 1/5 to 1/1.
申请公布号 KR20160089855(A) 申请公布日期 2016.07.28
申请号 KR20150167354 申请日期 2015.11.27
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. 发明人 SU CHUAN FANG;CHUNG KUN ZHI;LUNG YUAN HSIANG
分类号 H01L27/02;G03F1/36 主分类号 H01L27/02
代理机构 代理人
主权项
地址