| 摘要 |
PURPOSE:To minimize intrusion of a trace memory into an actual operating memory area of a CPU by supplying the address of the trace memory from an up/down counter with the preset function. CONSTITUTION:When the trace address is read out, the CPU performs the read access to SL1 address, and SL1 and OC2 are set to the high level together. A signal RD goes to the low level, and the trace address written in a trace memory 1 is taken out onto a data bus. Each time the signal RD is inputted to an up/down counter 9 with the preset function, the counter 9 is decremented to designate the next address of the trace memory 1. When trace data is read out from the trace memory 1, the CPU performs the read access to SL2 address to set SL2 and OC4 to the high level together, and then, trace data written in the trace memory 1 is taken out.
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