发明名称 A PACKAGE FOR INTEGRATED CIRCUITS
摘要 <p>The invention relates to a package for VLSI-chips. A substrate means (A1; B1; C1), a frame means (3; 14) and a lid means (A5; B5; C5) makes a housing having an inside cavity. First connection means (4; 16) are provided on the inside of said cavity in electrical contact with external contact means (6; 22) on the outside of the housing. A chip (A3; B3; C3) having second connection means (8; B19) is placed inside the cavity. At least one interconnection film (A2; B2; C2) is placed adjacent the chip (A3; B3; C3) and has third and fourth connection means (9, 5; 21, 20). The third connection means (9; 21) are positioned to make contact with the second connection means (8; B19) on the chip. The fourth connection means (5; 20) are positioned to make contact with the first connection means (4; 16) inside the cavity. Individual ohmic contacts are provided individually between chosen among the third and fourth connection means (9, 5; 21, 20) for making connection between chosen of the first and second connection means (4, 8; 16, 22).</p>
申请公布号 WO1992016091(A1) 申请公布日期 1992.09.17
申请号 SE1992000118 申请日期 1992.02.26
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