Enhanced data transfer in multi-CPU systems

摘要

A method implemented in a memory device, wherein the memory device comprises a first memory and a second memory, the method comprising receiving a direct memory access (DMA) write request from a first central processing unit (CPU) in a first computing system, wherein the DMA write request is for a plurality of bytes of data, in response to the DMA write request receiving the plurality of bytes of data from a memory in the first computing system without processing by the first CPU, and storing the plurality of bytes of data in the first memory, and upon completion of the storing, sending an interrupt message to a second CPU in a second computing system, wherein the interrupt message is configured to interrupt processing of the second CPU and initiate transfer of the plurality of bytes of data to a memory in the second computing system.

主权项

1. A method implemented in a memory device, wherein the memory device comprises a first memory and a second memory, the method comprising:
receiving a direct memory access (DMA) write request from a first central processing unit (CPU) in a first computing system, wherein the DMA write request is for a plurality of bytes of data; in response to the DMA write request: receiving the plurality of bytes of data from a memory in the first computing system without processing by the first CPU; and storing the plurality of bytes of data in the first memory; and sending, upon completion of the storing, an interrupt message to a second CPU in a second computing system, wherein the interrupt message is configured to interrupt processing of the second CPU and initiate transfer of the plurality of bytes of data to a memory in the second computing system, wherein the second memory is divided into at least two segments comprising a first segment and a second segment, wherein the first segment is assigned to the first computing system and the second segment is assigned to the second computing system for writing metadata regarding data transfer to the corresponding segment, and wherein either of the first and second computing systems are allowed to read from either segment.