发明名称 |
ADC and analog-to-digital converting method |
摘要 |
An analog-to-digital converter includes a successive approximation converter, a voltage comparator, and a controller. The successive approximation converter receives an analog input voltage and a first reference voltage, determines the level of a voltage of a first node as a negative level of the analog input voltage, and using a successive approximation method determines an output logic value corresponding to one bit of the N-bit output digital code at every one successive approximation cycle while adjusting the level of the voltage of the first node based on a level of the first reference voltage. The voltage comparator compares the level of the voltage of the first node with a level of a second reference voltage to generate a comparison logic value. When the output logic value or the comparison logic value satisfies a condition, the controller terminates conversion and determines the N-bit output digital code. |
申请公布号 |
US9413371(B1) |
申请公布日期 |
2016.08.09 |
申请号 |
US201514791720 |
申请日期 |
2015.07.06 |
申请人 |
SAMSUNG DISPLAY CO., LTD. |
发明人 |
Kim Jeongkyoo;Min Kyungyoul |
分类号 |
H03M1/00;H03M1/12;H03M1/44 |
主分类号 |
H03M1/00 |
代理机构 |
Lee & Morse, P.C. |
代理人 |
Lee & Morse, P.C. |
主权项 |
1. An analog-to-digital converter (ADC), comprising:
a converter to receive an analog input voltage and a first reference voltage, to determine a level of a voltage of a first node as a negative level of the analog input voltage through a sampling and holding operation, and to determine output logic values repeating a plurality of successive approximation cycles, each output logic value corresponding to a respective bit of an N-bit output digital code to be determined for each of a plurality of the successive approximation cycles, the level of the voltage of the first node to be adjusted based on a level of the first reference voltage during the successive approximation cycles; a voltage comparator to compare the level of the voltage of the first node with a level of a second reference voltage to generate a comparison logic value; and a controller to terminate an analog-to-digital conversion operation based on the successive approximation cycles and to determine the N-bit output digital code when the output logic value or the comparison logic value satisfies a certain condition. |
地址 |
Yongin, Gyeonggi-do KR |