| 摘要 |
The present invention provides a layout structure for an electrostatic discharge (ESD) protection circuit. The layout structure includes a first MOS device area, a second MOS device area, and a doped region. The first MOS device area has at least one source/drain region of a first polarity type. The second MOS device, which is adjacent to the first MOS device area, has at least one source/drain region of the first polarity type. A doped region of a second polarity type is interposed between the source/drain region of the first MOS device and the source/drain region of the second MOS device, such that the doped region and the source/drain regions interfacing therewith forming one or more diodes for dissipating ESD charges during an ESD event.
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