发明名称 |
ANALOG AND DIGITAL ADDITION AND SUBTRACTION CIRCUIT |
摘要 |
PURPOSE:To execute addition and subtraction with a simple constitution without using complicated convertors, in performing the addition and subtraction for analog and digital signals. |
申请公布号 |
JPS53110442(A) |
申请公布日期 |
1978.09.27 |
申请号 |
JP19770025570 |
申请日期 |
1977.03.09 |
申请人 |
YOKOGAWA ELECTRIC WORKS LTD |
发明人 |
YAMAMOTO SADAO |
分类号 |
H03M1/50;G06G7/14;G06J1/00 |
主分类号 |
H03M1/50 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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