| 摘要 |
A hybrid radar receiver includes an antenna array for receiving an input signal having a radar signal from a signal emitter. Each array element outputs an analog signal on a respective data channel. For each data channel, an activatable A/D converter is provided. A dedicated hardware circuit, which typically includes a detector/log video amplifier that is coupled to a threshold/pulse digitizer, is included to determine when a radar pulse is being received. When the circuit determines that a pulse is being received, the circuit activates each A/D converter to generate a digital signal on each channel. When a pulse is not currently being received, the circuit deactivates each A/D converter and digital signals are not produced. Pulse parameter(s) generated by the hardware circuit and the digital signals on each channel are sent to a software equipped processor which implements a signal emitter identification algorithm.
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