发明名称 SELECTIVE BURIED GROWTH OF GROUP III-V COMPOUND SEMICONDUCTOR
摘要 PURPOSE:To realize a manufacturing method which facilitates formation of a semiconductor integrated device in which elements are isolated by high resistance semiconductor and makes the surface of the device smooth by providing at least a process wherein a mixture of a semiconductor building-up atmosphere and a halide gas atmosphere is formed in the upstream side of a substrate and the semiconductor building-up is carried out. CONSTITUTION:In order to build up III-V compound semiconductor in trench parts provided on a semiconductor substrate by an organic metal vapor growth method, at least a process wherein a mixture of a semiconductor building-up atmosphere and a halide gas atmosphere is formed in the upstream side of the substrate and the compound semiconductor is built up is provided. For instance, a DH crystal in which trenches are formed at current blocking parts 207 of a laser and a coupling part 208 with an SiO2 film 206 as an etching mask is placed on a carbon susceptor 116 in an MOCVD apparatus and its temperature is elevated by a radio frequency induction coil 114. Then In(CH3)3 and Fe(C2H5)2 are supplied with H2 from a gas inlet 111, PH3 is supplied with H2 from a gas inlet 112 and HCl is supplied with H2 from a gas inlet 113 to build up Fe doped InP selectively.
申请公布号 JPH01175727(K1) 申请公布日期 1989.07.12
申请号 JP19870336030 申请日期 1987.12.29
申请人 NIPPON ELECTRIC CO 发明人 KATOU YOSHITAKE
分类号 H01L21/205;H01L21/20;H01S5/00;H01S5/026 主分类号 H01L21/205
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