SEMICONDUCTOR DEVICE, MANUFACTURING AND DESIGNING METHOD THEREFOR

摘要

PURPOSE: To improve planarity further for a boundary part of a chip, when planarity process in a CMP method is used. CONSTITUTION: In the semiconductor device, a dummy pattern 2b made of the same material as a wiring pattern 1 is formed inside a dicing part at a chip boundary part in a prescribed hierarchy out of laminated hierarchies on a semiconductor substrate is formed inside a dicing part. The area of the dummy pattern 2b with to respect the total area of the flat region is made 50% or larger in area constituted by the inner edge of the dummy pattern 2b, the outer edge line of the dicing part, and two desired parallel lines.