| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To make an overall memory size reducible by realizing a cross point cell using a capacitor element and a PNPN nanotube switch in connection with a nanotube cell and a memory apparatus using the same. <P>SOLUTION: This nanotube cell includes a capacitor element whose one terminal is connected with a word line and at least two or more continuously serial connected PNPN diode elements. The two or more PNPN diode elements are classified into two groups, and each group is linked in parallel between other terminals of capacitor components and bit lines, and they are provided with PNPN nanotube switches which are alternatively switched to a word line and a bit line according to magnitude of applied voltage. The PNPN nanotube switch is switched so as to read data stored in the capacitor elements in which a first voltage is applied to a word line, and when a second voltage of higher than the first voltage is applied to the bit line, it is characterized in performing switching operation so as to write data in the capacitor element. <P>COPYRIGHT: (C)2005,JPO&NCIPI</p> |
