| 摘要 |
A delay-locked loop reset signal generator is provided to stabilize the operation of a delay-locked loop by generating a normal delay-locked loop reset signal regardless of pulse width of an input signal. A pulse generation part(10,20) generate a pulse signal being activated according to the activation of a mode register set signal and having an increased activation period rather than an activation period of the mode register set signal, by using the mode register set signal and a control signal. A reset signal generation part(30) generates a delay-locked loop reset signal according to the pulse signal. The pulse generation part comprises a latch having an output level set according to the mode register set signal and reset by the control signal. |
