发明名称 Streamlining ata device initialization
摘要 The invention includes a platform having a controller coupled to a central processing unit through a system bus. The platform also includes a register device coupled between the central processing unit and the controller. Moreover, the platform also includes a bus coupled to the controller having an end that is adapted to receive a device. The register device includes a depth that is adapted to hold all instruction packets from the central processing unit without presenting delays due to full conditions.
申请公布号 AU9313301(A) 申请公布日期 2002.04.08
申请号 AU20010093133 申请日期 2001.09.27
申请人 INTEL CORPORATION 发明人 MICHAEL ESCHMANN;MICHAEL DERR
分类号 G06F13/38 主分类号 G06F13/38
代理机构 代理人
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