| 摘要 |
The system for synchronous sampling uses an encoded time signal, such as an IRIG-B signal. The IRIG-B signal is applied to an edge detector, which produces pulses based on the edges of the encoded time signal. These signals are applied to a phase-locked-loop assembly which is arranged to produce an output sampling synchronization signal which is locked to the transitions in the encoded time signal, providing a synchronous control signal for data sampling of input signals to a plurality of electronic instruments, in addition to the use of the IRIG-B signal as time-of-day clock synchronization for the plurality of instruments.
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