| 摘要 |
A detection circuit detects a slice start code from an input stream. Based on a result of the detection and a frame pulse, a reference macroblock (MB) address generated by a timing generator is sent to an address comparator. The input stream which has been phase-adjusted by a delay circuit is supplied to a variable length decoder (VLD) for decoding a variable length code to detect an MB address. The address comparator compares the reference MB address with the MB address to check the continuity of the MB address. If it is discontinuous, the stream output from the VLD is temporarily interrupted, and a selector selects a replacement data generating circuit in response to a control signal output from the address comparator. The input stream is replaced at a discontinuous macroblock portion with macroblock data which has a correct macroblock address and which is prepared in advance by the replacement data generating circuit. This provides stable processing of macroblock discontinuities when I-pictures in an MPEG stream are input.
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