Semiconductor apparatus

摘要

A delay circuit of a semiconductor apparatus includes a control signal generation block configured to output a control signal having an analog voltage level in response to an input signal, and an input/output block configured to delay the input signal by a delay amount based on the analog voltage level of the control signal, and output a resultant signal.

主权项

1. A delay circuit of a semiconductor apparatus, comprising:
a control signal generation block configured to output a control signal having an analog voltage level in response to an input signal; and an input/output block configured to delay the input signal by a delay amount based on the analog voltage level of the control signal, and output a resultant signal, wherein the control signal generation block comprises: a voltage supply unit configured to supply an internal voltage to a first node; a pull-down driving unit configured to pull-down drive a second node; a first variable resistor and a first transistor electrically coupled between the first and the second nodes in series, a gate of the first transistor receiving a reference voltage; and a second variable resistor and a second transistor electrically coupled between the first and the second nodes in series, a gate of the second transistor receiving the input signal; and wherein the control signal is output from a third node between the second variable resistor and the second transistor.